Author :Iflowpower – Portable Power Station Supplier
Reduce cell phone power consumption and extend its battery life is the goal of each mobile phone design engineer. Design engineers are constantly adding MP3 players, cameras, and full motor videos such as modern mobile phones, which will continue to minimize power consumption. Reduce the power supply voltage of the mobile phone important chip (such as analog baseband chip and digital baseband chip) - may be 2.
8V or even 1.8V - a method of reducing power consumption. But when the design engineer should retain one or more support chips with high supply voltages, there is a problem.
The most common is that the extra function of smartphones will be higher. One of the examples is the string ringtone, since the audio signal peak range is about 3.2V, so the circuit that occurs and transmits these ringtone is usually 4.
2V power supply voltage. In this way, problems occur at the interface between baseband and ringtone circuits. To illustrate this problem, we should use an analog switch to switch voice or ringtone to the speaker as an example.
In order to convert these two types of circuits on the same block (PCB), the power consumption is used, or the low voltage digital logic drive analog switch in the baseband chip is used. However, it should be noted that the latter method may lose power consumption obtained from the baseband chip to reduce the power supply voltage, because when the analog switch is working in non-ideal mode, there will be a lot of perfusion current. One simple way to solve this problem is to change the digital logic from the baseband chip to maintain the baseband chip to save power using a 1.
8V voltage, but this method should be higher voltage driver must work at higher voltage. Any chip in your phone. In order to further explain this method, how to level the converter, let us see where the current is actually flowing.
As shown in Figure 1, the digital input of the analog switch is a basic CMOS buffer consisting of PMOS and NMOS transistors connected to the inverter. Add signal to the I / P input pin of the buffer. When the input voltage is higher than the input high voltage (VIH), the output voltage of the buffer is VDD (power supply voltage), when the input voltage is below the input low voltage (VIL), the output voltage of the buffer is GND (ground).
This ensures that the gate voltage of the analog switch is a voltage of a power source, thereby making its signal range. Simultaneous monitoring of the I-V characteristic curve shown in Figure 2 while monitoring the input voltage from 0 to VDD scanning input voltage. When the input voltage is any end voltage of the power supply voltage, IDD drops to the minimum (0μA).
However, when the input voltage is close to the hopping point of the buffer, the IDD has increased dramatically. Therefore, when the digital input voltage applied to the I / P end is a voltage of the power source, the analog switch consumes the minimum power consumption. The characteristic curve has the characteristic curve due to the NMOS and PMOS switch tubes used in the buffer design, actually as a voltage control resistor.
The characteristics of these chips are as follows: VGS> VT-> Transistor Tube Tutor The VGS transistor is turned off to form a threshold voltage, and a conductive channel is formed between the source and the drain when the voltage is higher than the voltage. NMOS transistor Vt is 0.9V, PMOS transistor Vt is -0.
9V. Therefore, when the input voltage is 0V, the PMOS (M1) is in the on state, and the output of the first stage is VDD. In the second stage, the NMOS (M5) device is in a state in which the buffer has the total output of 0V.
The buffer input voltage increases (before reaching the maximum current) caused the impedance of M1 (M1 start to turn off) and the m5 of the impedance decline (M5 began to turn on), then we will see VDD and GND. Hyper-impedance channel formed. Further increasing the input voltage will cause only one transistor in the input and output transistor pairs of the buffer.
We use the above principles to continue to analyze analog switch instances, consider using Adi's ADG884 analog switches to switch between mobile phone spinning rings and speech. Control signal from digital baseband chip is 1.8V.
As shown in FIG. 2, if the simulated switch is directly driven with a digital signal of 1.8V, the power supply current should be 120μA.
If the digital input voltage of the analog switch is higher than 3.8V, then power consumption should actually be 0. Therefore, in order to make the analog switch operating at the lowest power area, the digital signal of the digital baseband chip is to transform to a higher voltage.
Adi's SC70 ultra-small package and usually only consumes only 0.1μA current, as a level converter is very suitable for this work. As shown in FIG.
3, it can be connected to the power supply voltage of the baseband chip and the power supply voltage of the analog switch and convert the logic level between the two chips. Of course, the analog switch in the above example can be any chip working at higher voltages. Contemporary mobile phones consist of multiple CMOS integrated circuits (ICs) to complete different functions, such as audio and video and digital cameras.
These ICs typically work under any voltage between 5V to 1.8V, sometimes even lower power supply voltage. In summary, we use levels of power saving power to extend battery life.
The following factors should be considered: low-end mobile phones typically use 600mAh capacity battery. The battery standby time of the low-end phone is 300 hours (HR), and its nominal current is 2mA. If a level shift is not performed, the analog switch used in this example will absorb the current of 4.
8%, but if only the above level is converted, only 0.04% current is absorbed.